Table of Contents

• Message from the Technical Program Chairs; ISVLSI 2024Garrett S. Rose, Tosiron Adegbija, Selçuk Köse. [doi]
• Message from the Quantum Computing Workshop Chairs; ISVLSI 2024Travis S. Humble, Himanshu Thapliyal. [doi]
• Message from the General Chairs; ISVLSI 2024Himanshu Thapliyal, Jürgen Becker 0001. [doi]
• Secure Energy-Efficient Implementation of CNN on FPGAs for Accuracy Dependent Real Time Task ProcessingKrishnendu Guha, Amlan Chakrabarti. 1-6 [doi]
• STCO: Driving the More than Moore EraDwaipayan Biswas, James Myers, Srikanth B. Samavedam, Julien Ryckaert. 7-8 [doi]
• An 8-bit 1 MS/s Low-Power SAR ADC with an Enhanced EPC for Implantable Medical DevicesDeepika Kumaradasan, Sougata Kumar Kar, Santanu Sarkar. 9-14 [doi]
• Generating Storage-Aware Test Sets Targeting Several Fault ModelsHari Addepalli, Irith Pomeranz, M. Enamul Amyeen, Suriyaprakash Natarajan, Arani Sinha, Srikanth Venkataraman. 15-20 [doi]
• Sub-Micron Binary HyperPixel Sensor Circuit: In-Pixel Binarization with Variable ThresholdingMd Rahatul Islam Udoy, Md. Mazharul Islam 0006, Akhilesh Jaiswal 0001, Ahmedullah Aziz. 21-26 [doi]
• Ultra-Small Area, Highly Linear, Modified All Mosfet Digital-to-Analog Converters with Novel Real Time Digital Calibration AlgorithmEkaniyere Oko-Odion, Isaac Bruce, Emmanuel Nti Darko, Michael Sekyere, Degang Chen 0001. 27-32 [doi]
• Thermal Analysis of 3D Stacking and BEOL Technologies with Functional Partitioning of Many-Core RISC-V SoCMohamed Naeim, Herman Oprins, Sudipta Das, Geert Van der Plas, Yun Dai, Pinhong Chen, CT Kao, Dwaipayan Biswas, Dragomir Milojevic. 33-38 [doi]
• Automated Deep Neural Network Inference Partitioning for Distributed Embedded SystemsFabian Kreß, El Mahdi El Annabi, Tim Hotfilter, Julian Höfer, Tanja Harbaum, Jürgen Becker 0001. 39-44 [doi]
• Thermal Implications in Scaling High-Performance Server 3D Chiplet-Based 2.5D SoC from FinFET to NanosheetYukai Chen, Venkateswarlu Sankatali, Subrat Mishra, Julien Ryckaert, James Myers, Dwaipayan Biswas. 45-50 [doi]
• Energy-aware Incremental OTA Update for Flash-based Batteryless IoT DevicesWei Wei, Jishnu Banerjee, Sahidul Islam, Chen Pan, Mimi Xie. 51-56 [doi]
• Design of Multiplier Circuit Based on Signed-Digit Hybrid Stochastic ComputingYinjie Song, Hongge Li, Xinyu Zhu, Yuhao Chen. 57-62 [doi]
• Energy-Efficient Design of Approximate VVC Interpolation Filters UnitsRafael da Silva, Mateus Grellert, Ricardo Reis 0001. 63-68 [doi]
• Adaptive and Offloaded CNNs for IoT-Edge FPGAsGuilherme Korol, Hiago Mayk G. de A. Rocha, Antonio Carlos Schneider Beck. 69-74 [doi]
• HIERA: High-Quality and High-Throughput Dehazing Hardware Accelerator with Reconfigurable Computing UnitJunhao Zhang, Dongqi Fan, Liang Chang. 75-80 [doi]
• Area-Efficient Digital Design Using RRAM-CMOS Standard CellsMarkus Fritscher, Max Uhlmann, Philip Ostrovskyy, Daniel Reiser, Junchao Chen 0001, Markus Andreas Schubert, Carsten Schulze, Gerhard Kahmen, Dietmar Fey, Marc Reichenbach, Milos Krstic, Christian Wenger. 81-87 [doi]
• DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointingMuhammad Awais 0009, Hassan Ghasemzadeh Mohammadi, Marco Platzner. 88-93 [doi]
• A High-accuracy Time-efficient Error Metric Model for Approximate Computing CircuitsShouji Chen, Ke Chen 0018, Ziying Cui, Weiqiang Liu 0001. 94-99 [doi]
• Random Microfluidic Chip Design with Diagonal Channels Using K-Means Clustering for Fluid DilutionsAnkita Agrawal, Sudip Roy 0001. 100-105 [doi]
• Most Significant Digit First Multiply-and-Accumulate Unit for Neural NetworksSahar Moradi Cherati, Mohsen Barzegar, Leonel Sousa. 106-111 [doi]
• Exploring a Hybrid SRAM-RRAM Computing-In-Memory Architecture for DNNs Model InferenceYu-Guang Chen, Zhi-Wei Liu, Ying-Jing Tsai. 112-117 [doi]
• Accelerating Large Language Model Training with In-Package Optical Links for Scale-Out SystemsAakash Patel, Dwaipayan Biswas, Joyjit Kundu, Yoojin Ban, Nicolas Pantano, Arindam Mallik, Julien Ryckaert, James Myers. 118-123 [doi]
• BafSP: Co-Design of Compute SRAM and Bit-Aware Data Flip Mitigation with In-Memory Sparsity Detection for SpMMXiaojie Li, Mingyu Wang, Yangzhan Mai, Yicong Zhang, Baiqing Zhong, Zhiyi Yu. 124-129 [doi]
• SHIFFT: A Scalable Hybrid In-Memory Computing FFT AcceleratorPragnya Sudershan Nalla, Zhenyu Wang, Sapan Agarwal, T. Patrick Xiao, Christopher H. Bennett, Matthew J. Marinella, Jae-sun Seo, Yu Cao 0001. 130-135 [doi]
• RFET-Based Dynamic Differential Logic Cells Against Power Side-Channel AttacksNima Kavand, Armin Darjani, Garvit Chhabra, Akash Kumar 0001. 136-142 [doi]
• Enhancing Graph Execution for Performance and Energy Efficiency on NUMA MachinesHiago Mayk G. de A. Rocha, Marcelo K. Moori, Guilherme Korol, Arthur Francisco Lorenzon, Antonio Carlos Schneider Beck. 143-148 [doi]
• Towards Quantum-Resistant Security: Pre-Silicon Power Side-Channel Leakage Analysis of CRYSTALS-KyberNashmin Alam, Tao Zhang, Farimah Farahmandi. 149-154 [doi]
• Efficient Federated Learning Through Distributed Model PruningMohammad Munzurul Islam, Mohammed Alawad. 155-160 [doi]
• DAW-DMR: Divergence-Aware Warped DMR with Full Error Detection for GPGPU sYukun Wei, Mingyu Wang, Haiqiu Huang, Wangguang Wang, Zhiyi Yu. 161-166 [doi]
• Embedding Power Signature Generation into Low Dropout Voltage Regulators for Enhancing IoT SecurityAshish Mahanta, Haibo Wang. 167-172 [doi]
• A Fine-Grained Dynamic Partitioning Against Cache-Based Timing Attacks via Cache LockingNicolas Gaudin, Pascal Cotret, Guy Gogniat, Vianney Lapôtre. 173-179 [doi]
• Defending the Citadel: Fault Injection Attacks Against Dynamic Information Flow Tracking and Related CountermeasuresWilliam Pensec, Francesco Regazzoni Alari, Vianney Lapotre, Guy Gogniat. 180-185 [doi]
• Energy-Efficient and Low-Latency Computation of Transcendental Functions in a Precision-Tunable PIM ArchitectureGian Singh, Ayushi Dube, Sarma B. K. Vrudhula. 186-191 [doi]
• In-Sensor Motion Recognition with Memristive System and Light Sensing SurfacesHritom Das, Imran Fahad, SNB Tushar, Sk Hasibul Alam, Graham Buchanan, Danny Scott, Garrett S. Rose, Sai Swaminathan. 192-197 [doi]
• SNN-ANN Hybrid Networks for Embedded Multimodal Monocular Depth EstimationSadia Anjum Tumpa, Anusha Devulapally, Matthew Brehove, Espoir Kyubwa, Vijaykrishnan Narayanan. 198-203 [doi]
• DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMDPengbo Yu, Flavio Ponzina, Alexandre Levisse, Dwaipayan Biswas, Giovanni Ansaloni, David Atienza, Francky Catthoor. 204-209 [doi]
• Optimizing LU Decomposition with RISC-V Based Hardware AccelerationMekala Bindu Bhargavi, Grandhala Sri Sai Harshith, Sri Parameswaran, Soumya J.. 210-215 [doi]
• Unfolded SiBM BCH Decoders for High- Throughput Low-Latency ApplicationsXu Wang, Christoffer Fougstedt, Lars J. Svensson, Per Larsson-Edefors. 216-221 [doi]
• Boosting Multiple Multipliers Packing on FPGA DSP Blocks via Truncation and Compensation-based ApproximationBehnam Ghavami, Mahdi Sajadi, Lesley Shannon, Steve Wilton. 222-227 [doi]
• High Energy Efficiency Radix-4 Booth Multiplier with Zero Encoding Skipping MechanismXinyu Zhu, Hongge Li, Yinjie Song, Yuhao Chen, Xiaoyu Guo. 228-233 [doi]
• Dynamic Exit Selection for Comprehensive and Energy Efficient Gait-Based User Authentication on IoT DevicesPavlos Zouridakis, Sai Manoj Pudukotai Dinakarrao. 234-239 [doi]
• Compressed Latent Replays for Lightweight Continual Learning on Spiking Neural NetworksAlberto Dequino, Alessio Carpegna, Davide Nadalini, Alessandro Savino, Luca Benini, Stefano Di Carlo, Francesco Conti 0001. 240-245 [doi]
• Machine Learning based Decoding of Heavy Hexagonal QECC for Asymmetric Quantum NoiseDebasmita Bhoumik, Ritajit Majumdar, Dhiraj Madan, Susmita Sur-Kolay. 246-251 [doi]
• HO-FPIA: High-Order Field-Programmable Ising Arrays with In-Memory ComputingTinish Bhattacharya, George Higgins Hutchinson, Giacomo Pedretti, Dmitri B. Strukov. 252-259 [doi]
• Towards Thermally Reliable Photonic Links for Multicore ProcessorsYuxiang Fu, Xuanqi Chen, Jiaxu Zhang, Shixi Chen, Jiang Xu 0001. 260-265 [doi]
• An Efficient and Scalable Clocking Assignment Algorithm for Multi-Threaded Multi-Phase Single Flux Quantum CircuitsRobert S. Aviles, Xi Li, Lei Lu, Zhaorui Ni, Peter A. Beerel. 266-271 [doi]
• Technology Mapping for Cryogenic CMOS CircuitsBenjamin Hien, Marcel Walter, Victor M. van Santen, Florian Klemme, Shivendra Singh Parihar, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch, Robert Wille. 272-277 [doi]
• Automatic Validation and Design of Microfluidic Devices Following the ISO 22916 StandardPhilipp Ebner, Robert Wille. 278-283 [doi]
• Embracing Privacy, Robustness, and Efficiency with Trustworthy Federated Learning on Edge DevicesMinxue Tang, Jingwei Sun 0002, Hai Helen Li, Yiran Chen 0001. 284-289 [doi]
• Approximate Ternary Matrix Multiplication for Image Processing and Neural NetworksL. Hemanth Krishna, B. Srinivasu. 290-295 [doi]
• An Intelligent Memory Framework for Resource Constrained IoT SystemsPrabuddha Chakraborty, Swarup Bhunia. 296-299 [doi]
• Predicting Stress in Older Adults with RNN and LSTM from Time Series Sensor Data and CortisolMd. Saif Hassan Onim, Himanshu Thapliyal. 300-306 [doi]
• Side-Channel and Fault Resistant ASCON Implementation: A Detailed Hardware EvaluationAneesh Kandi, Anubhab Baksi, Peizhou Gan, Sylvain Guilley, Tomas Gerlich, Jakub Breier, Anupam Chattopadhyay, Ritu Ranjan Shrivastwa, Zdenek Martinasek, Shivam Bhasin. 307-312 [doi]
• Adversarial Attack Resilient ML-Assisted Hardware Trojan Detection TechniqueMohammed Alkurdi, Ashutosh Ghimire, Fathi H. Amsaad 0001. 313-318 [doi]
• 1-D Robust Chaotic Maps Through Systematic Shifting and Halfway Shifted ProductMd Sakib Hasan, Mrittika Chowdhury, Ziyi Niu, Shuai Song, Anurag Dhungel. 319-324 [doi]
• Splitting the Secrets: A Cooperative Trust Model for System-on-Chip Designs with Untrusted IPsAritra Dasgupta, Sudipta Paria, Prabuddha Chakraborty, Swarup Bhunia. 325-330 [doi]
• Energy-Efficient Near-Sensor Event Detector Based on Multilevel Ga2O3 RRAMMehrdad Morsali, Sepehr Tabrizchi, Ravi Teja Velpula, Mano Bala Sankar Muthu, Hieu Pham Trung Nguyen, Mohsen Imani, Arman Roohi, Shaahin Angizi. 331-336 [doi]
• Evaluation of Neuron Parameters on the Performance of Spiking Neural Networks and Neuromorphic HardwareCatherine D. Schuman, Hritom Das, Garrett S. Rose, James S. Plank. 337-342 [doi]
• Multi-Objective Neural Architecture Search for In-Memory ComputingMd Hasibul Amin, Mohammadreza Mohammadi, Ramtin Zand. 343-348 [doi]
• ResSen: Imager Privacy Enhancement Through Residue Arithmetic Processing in SensorsNedasadat Taheri, Sepehr Tabrizchi, Deniz Najafi, Shaahin Angizi, Arman Roohi. 349-354 [doi]
• HELP: Highly Efficient and Low-Latency Hardware Accelerator for Integer Polynomial MultiplicationPengzhou He, Tianyou Bao, Çetin Kaya Koç, Jiafeng Xie. 355-360 [doi]
• Exploring Security Solutions and Vulnerabilities for Embedded Non-Volatile MemoriesZakia Tamanna Tisha, Jeremy Muldavin, Ujjwal Guin. 361-366 [doi]
• Attacking Multi-Tenant FPGAs Without Manual Placement and RoutingMd Toufiq Hasan Anik, Hasin Ishraq Reefat, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi. 367-372 [doi]
• A Survey of Side-Channel Attacks in Superconducting Quantum ComputersNavnil Choudhury, Kanad Basu. 373-378 [doi]
• HI-SST: Safeguarding SiP Authenticity Through Secure Split-Test in Heterogeneous IntegrationPaul Calzada, Md Sami Ul Islam Sami, Jingbo Zhou, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor. 379-384 [doi]
• LLMs and the Future of Chip Design: Unveiling Security Risks and Building TrustZeng Wang, Lilas Alrahis, Likhitha Mankali, Johann Knechtel, Ozgur Sinanoglu. 385-390 [doi]
• Self-HWDebug: Automation of LLM Self-Instructing for Hardware Security VerificationMohammad Akyash, Hadi Mardani Kamali. 391-396 [doi]
• IP Security in Structured ASIC: Challenges and ProspectsRasheed Almawzan, Sudipta Paria, Aritra Dasgupta, Kostas Amberiadis, Swarup Bhunia. 397-402 [doi]
• PristiQ: A Co-Design Framework for Preserving Data Security of Quantum Learning in the CloudZhepeng Wang 0001, Yi-sheng, Nirajan Koirala, Kanad Basu, Taeho Jung, Cheng-Chang Lu, Weiwen Jiang. 403-408 [doi]
• Scaling Analog Photonic Accelerators for Byte-Size, Integer General Matrix Multiply (GEMM) KernelsOluwaseun Adewunmi Alo, Sairam Sri Vatsavai, Ishan G. Thakkar. 409-414 [doi]
• A Memristive Reconfigurable Neuromorphic Array for Neuro-Inspired Dynamic ArchitecturesHritom Das, Nishith N. Chakraborty, Manu Rathore, Sk Hasibul Alam, Catherine D. Schuman, Garrett S. Rose. 415-420 [doi]
• SegmentAI: A Neural Net Framework for Optimized Multiclass Image Segmentation via FPGAUchechukwu Leo Udeji, Martin Margala. 421-426 [doi]
• ConFUSE: Confusion-based Federated Unlearning with Salience ExplorationSyed Irfan Ali Meerza, Amir Sadovnik, Jian Liu 0001. 427-432 [doi]
• DT-IoMT: A Digital Twin Reference Model for Secure Internet of Medical ThingsMd Rafiul Kabir, Sandip Ray. 433-438 [doi]
• Low-power and Computing-free Privacy Design for IoT SystemsHui Sun, Kyle Mooney, Mario Renteria-Pinon, Tingxiang Ji, Hritom Das, Na Gong, Jianqing Liu. 439-444 [doi]
• Exploring the Correlation Between DRAM Latencies and Rowhammer AttacksMd. Sadik Awal, Md. Tauhidur Rahman 0001. 445-450 [doi]
• Long-Term Predictive Analytics of Continuous Glucose Sensing for Enhanced Glycemic ControlMd Maruf Hossain Shuvo, Twisha Titirsha, Giuseppe Oliva, Salvatore A. Pullano, Syed Kamrul Islam. 451-456 [doi]
• Machine Learning Intervened RIS-Based RF Interference Management for IoTSakib Reza, Sanjay Das, Shamik Kundu, Kanad Basu, Ifana Mahbub. 457-462 [doi]
• A Low-Cost Minimally-Processed Inkjet-Printed Nonlinear Element for Reservoir ComputingShahrin Akter, Mohammad Rafiqul Haider. 463-468 [doi]
• Energy-Efficient Power Analysis Attack Resilient Adiabatic MTJ-Based Nonvolatile CLBMilad Tanavardi Nasab, Wu Yang, Himanshu Thapliyal. 469-474 [doi]
• Hardware-Efficient ECC Processor Design using Non-Homogeneous Split Hybrid Karatsuba MultiplierPruthvi Parate, Alwin Shaju, Sanampudi Gopala Krishna Reddy, Vasanthi D. R, Madhav Rao. 475-480 [doi]
• Optimal Application Allocation and Wireless User Association for Robust Edge ComputingTerry N. Guo. 481-483 [doi]
• A Survey of Edge Computing Privacy and Security Threats and Their CountermeasuresAhmed Shafee, Tasneem A. Awaad, Ahmed Moro. 484-489 [doi]
• System Support for Environmentally Sustainable Computing in Data CentersFan Chen. 490-495 [doi]
• SCARIF: Towards Carbon Modeling of Cloud Servers with AcceleratorsShixin Ji, Zhuoping Yang, Xingzhen Chen, Stephen Cahoon, Jingtong Hu, Yiyu Shi 0001, Alex K. Jones, Peipei Zhou 0001. 496-501 [doi]
• Improving the Sustainability of Solid-State Drives by Prolonging LifetimeZhaokang Ke, Dingyi Kang, Bo Yuan 0001, David Du, Bingzhe Li. 502-507 [doi]
• Resource-Efficient Adaptive-Network Inference Framework with Knowledge Distillation-Based Unified LearningRebati Raman Gaire, Sepehr Tabrizchi, Arman Roohi. 508-513 [doi]
• Water-Wise Computing: Addressing Data Center Water Consumption for a Sustainable FutureMohammad A. Islam 0001. 514 [doi]
• Carbon-Aware Design of DNN Accelerators: Bridging Performance and SustainabilityAikaterini Maria Panteleaki, Iraklis Anagnostopoulos. 515-520 [doi]
• TinyML for ECG Biometrics on Resource Constrained DevicesYogeswar Reddy Thota, Tooraj Nikoubin. 521-526 [doi]
• WAFER: Wearable, Ambient-Aware Adversarial Fall Event Detection System Using a RISC-V SoC ArchitectureTamonash Bhattacharyya, Akanksha Lohia, Prasun Ghosal, Himanshu Thapliyal. 527-532 [doi]
• Design Approaches and Consideration for a Reliable and Efficient Monolithic 3D IntegrationMadhava Sarma Vemuri, Umamaheswara Rao Tida. 533-538 [doi]
• Pasteables: A Flexible, Stick-and-Peel Smart Sensing Platform for Edge ApplicationsReiner N. Dizon-Paradis, Aritra Dasgupta, Rohan Reddy Kalavakonda, Swarup Bhunia. 539-543 [doi]
• Quantum Machine Learning for Anomaly Detection in Consumer ElectronicsSounak Bhowmik, Himanshu Thapliyal. 544-550 [doi]
• Integration of Memristive Encoders for On-Device Automation of Low-Power Wearable Energy Management SystemsShekhar Suman Borah, Prabha Sundaravadivel, Mustafa Hannoun, Premananda Indic. 551-556 [doi]
• Multi-GHz Zeptojoule Computing Using Emerging Adiabatic Superconductor CircuitsChristopher L. Ayala, Nobuyuki Yoshikawa, Yu Hoshika, Yuto Omori. 557-564 [doi]
• Scalable Superconductor Ising Machine for Combinatorial Optimization ProblemsBeyza Zeynep Ucpinar, Sasan Razmkhah, Mehdi Kamal, Massoud Pedram. 565-570 [doi]
• EMspice 2.0: Multiphysics Electromigration Analysis Tool for Beyond Moore ICsSubed Lamichhane, Mohammadamir Kavousi, Sheldon X.-D. Tan. 571-576 [doi]
• Skyrmion-Based Ternary CPU DesignKorinna Frangias, Mi-Young Im, Hee-Sung Han, Dilip Vasudevan. 577-584 [doi]
• Harnessing Approximate Computing for Machine LearningSalar Shakibhamedan, Amin Aminifar, Luke Vassallo, Nima Taherinejad. 585-591 [doi]
• From Device to Application - Integrating RRAM Accelerator Blocks into Large AI SystemsMarkus Fritscher, Christian Wenger, Milos Krstic. 592 [doi]
• Extended Abstract: Quantum-Accelerated Transient Stability Assessment for Power SystemsJianing Chen, Yan Li. 593-594 [doi]
• Residue Number System (RNS) Based Distributed Quantum AdditionBhaskar Gaur, Travis S. Humble, Himanshu Thapliyal. 595-600 [doi]
• Design Automation Challenges and Benefits of Dynamic Quantum Circuit in Present NISQ Era and Beyond: (Invited Paper)Abhoy Kole, Kamalika Datta, Rolf Drechsler. 601-606 [doi]
• Can ML-Based Reliability Models Span Quantum Hardware Boundaries?Georgios Ioannou, Gopika Kizhuvettil, Mohammad Walid Charrwi, Samah Mohamed Saeed. 607-612 [doi]
• Visual Analytics of Performance of Quantum Computing Systems and Circuit OptimizationJunghoon Chae, Chad A. Steed, Travis S. Humble. 613-618 [doi]
• Anomaly Detection for Real-World Cyber-Physical Security Using Quantum Hybrid Support Vector MachinesTyler Cultice, Md. Saif Hassan Onim, Annarita Giani, Himanshu Thapliyal. 619-624 [doi]
• Two exact quantum signal processing resultsBjorn K. Berntson, Christoph Sünderhauf. 625-626 [doi]
• 12C Rotational BandDarin C. Mumma, Zhonghao Sun, Alexis Mercenne, Kristina D. Launey, Soorya Rethinasamy, James A. Sauls. 627-631 [doi]
• A Novel Quantum Generalized Neighbor Interpolation Design for Image TransformationsIsrael Koiku, Edgard Muñoz-Coreas. 632-633 [doi]
• Transfer Learning Based Hybrid Quantum Neural Network Model for Surface Anomaly DetectionSounak Bhowmik, Himanshu Thapliyal. 634-639 [doi]
• Mathematical Model for SWAP Gate Minimization on NISQ HardwareSamuel Bringman, Anthony Wilkie, Rebekah Herrman, James Ostrowski. 640-643 [doi]
• Trojan Taxonomy in Quantum ComputingSubrata Das, Swaroop Ghosh. 644-649 [doi]
• Qubit and T-count Optimized Quantum Circuit Design for Fixed Precision Square RootAfrin Sultana, Edgard Muñoz-Coreas. 650-655 [doi]
• ICE TEA: Insertion of Custom Early Exits for Time-, Energy- & Anomaly-Aware Neural NetworksMatthias Stammler, Julian Höfer, Patrick Schmidt, Tanja Harbaum, Jürgen Becker 0001. 656-660 [doi]
• Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL AcceleratorsPrabhu Vellaisamy, Harideep Nair, Di Wu, R. D. Shawn Blanton, John Paul Shen. 661-665 [doi]
• Hardware-Application Co-Design to Evaluate the Performance of an STDP-based Reservoir ComputerHritom Das, Karan P. Patel, Shelah Ameli, Nishith N. Chakraborty, Catherine D. Schuman, Garrett S. Rose. 666-670 [doi]
• Maximizing Efficiency of SNN-Based Reservoir Computing via NoC-Assisted Dimensionality ReductionManu Rathore, Garrett S. Rose. 671-674 [doi]
• Meta-Heuristic Optimization of CNNs with Approximate Error Distributed MultipliersSaket Gurjar, Aamod B. K, Varad Bharadiya, Bindu G. Gowda, Madhav Rao. 675-679 [doi]
• ChIRAAG: ChatGPT Informed Rapid and Automated Assertion GenerationBhabesh Mali, Karthik Maddala, Vatsal Gupta, Sweeya Reddy, Chandan Karfa, Ramesh Karri. 680-683 [doi]
• Event-Based Power Analysis Integrated with Timing Characterization and Logic SimulationKatayoon Basharkhah, Zainalabedin Navabi. 684-688 [doi]
• PACE: MLP-Based Fast and Accurate Per-Cycle Chip Power ModellingCem Benar, George Phan, Sylvia Chan, Zongfang Lin, Yat Fai Lam, Robert Chu. 689-693 [doi]
• Soft Error Assessment of UAV Control Algorithms Running in Resource-Constrained MicroprocessorsAlex Hanneman, Jonas Gava, Paulo Vancin, Aqsa Kk Kaim-Khani, Sam Amiri, Rafael Garibotti, Fernando Moraes 0001, Ney Calazans, Ricardo Reis 0001, Luciano Ost. 694-698 [doi]
• A 1.7 GHz Tuning Range LC-VCO with Varactors Array and Switched Cross-Coupled CoreRaphael R. N. Souza, Agord M. Pinto, Roberto Lacerda de Orio, Leandro Tiago Manera, Eduardo R. de Lima. 699-703 [doi]
• Design and Analysis of an Electronically Tunable VDTA-Based Quadrature OscillatorShekhar Suman Borah, Mourina Ghosh, Bal Chand Nagar, Prabha Sundaravadivel. 704-707 [doi]
• A 3-Segment Interpolating String DAC with Low-Cost Built-In-Self-Test CapabilitiesIsaac Bruce, Emmanuel Nti Darko, Ekaniyere Oko-Odion, Kushagra Bhatheja, Matthew Crabb, Degang Chen 0001. 708-711 [doi]
• Unveiling Proactive Recovery's Preventative Impact on NAND Flash WearoutMuhammed Ceylan Morgül, Xinfei Guo, Mircea Stan. 712-716 [doi]
• Parametric Fault Diagnosis of Analog Circuits using Adaptive BoostingSupriyo Srimani, Kasturi Ghosh, Hafizur Rahaman 0001. 717-720 [doi]
• Structural Testing in MEDA Based Biochips: A New Technique Using Diagonal RoutePranab Roy, Sarit Chakrabarty, Tanmoy Biswas, Habibur Rahaman. 721-724 [doi]
• Compact 6T-SRAM Using Bottom-Gate Transistor in FD-SOI Process for Monolithic-3D IntegrationMadhava Sarma Vemuri, Tanvir Ahmed, Umamaheswara Rao Tida. 725-729 [doi]
• Quantum Anomalous Hall Effect Ternary Content Addressable MemoryMadison Ashbach, Md. Mazharul Islam 0006, Shamiul Alam, Ahmedullah Aziz, Sumitha George. 730-734 [doi]
• Compact Multiplexer Design with Multi-threshold Ferroelectric FETsSanwar Ahmed Ovy, Md Ashraful Islam Romel, Yi Xiao 0008, Yixin Xu, Kai Ni 0004, Sumitha George. 735-739 [doi]
• An Inkjet-Printed Flexible Memristor Device for Echo State NetworksTasnim Zaman Adry, Shahrin Akter, Sazia Eliza, Steven D. Gardner, Mohammad Rafiqul Haider. 740-744 [doi]
• Reliability Analysis of Phase Change Memory-Based Neuromorphic CircuitsTwisha Titirsha, Md Maruf Hossain Shuvo, Syed Kamrul Islam. 745-748 [doi]
• MOHSKM: Meta-Heuristic Optimization Driven Hardware-Efficient Heterogeneous-Split Karatsuba Multipliers for Large-Bit OperationsSaketh Gajawada, Dantu Nandini Devi, Madhav Rao. 749-752 [doi]
• Hybrid Stochastic Computing of Linear Time O(N) and Its In-Memory Computing for High PerformancesYuhao Chen, Hongge Li, Yinjie Song, Xinyu Zhu. 753-756 [doi]
• QA-NoCs: Quantitative Analysis for Trojan Detection in Network-on-ChipsPadmaja Bhamidipati, Ranga Vemuri. 757-761 [doi]
• Microplumber: Finding Hidden Sources of Power-Based SCL in MicrocontrollersArna Roy, Patrick Schaumont. 762-765 [doi]
• An Experimental Study of Dynamic Task Graph Parallelism for Large-Scale Circuit Analysis WorkloadsCheng-Hsiang Chiu, Tsung-Wei Huang. 766-770 [doi]
• Incremental Critical Path Generation for Dynamic GraphsChe Chang, Cheng-Hsiang Chiu, Boyang Zhang, Tsung-Wei Huang. 771-774 [doi]
• Natural Language Processing Meets Hardware Trojan Detection: Automating Security of FPGAsVaishnavi More, Aaditya Chaudhari, Barnaboss Puli, Vasavi Vuppala, Jaya Dofe, Wafi Danesh. 775-778 [doi]
• Investigate the Effects of Laser Attack on Intelligence of the AV PerceptionAbhijeet Solanki, Syed Rafay Hasan, Terry N. Guo. 779-782 [doi]
• A Variation-Aware and Energy-Efficient Spintronic True Random Number GeneratorSaeed Mehri, Arefe Amirany, Milad Tanavardi Nasab, Kian Jafari, Mohammad Hossein Moaiyeri. 783-786 [doi]
• Navigating the Challenges of Statistical Fault Injection in SRAM-FPGATrishna Rajkumar, Johnny Öberg. 787-788 [doi]
• BatchSim: Parallel RTL Simulation Using Inter-Cycle Batching and Task Graph ParallelismJie Tong, Liangliang Chang, Umit Yusuf Ogras, Tsung-Wei Huang. 789-793 [doi]
• Low-Precision Vectorized Arithmetic Unit Designs for Deep LearningLing Zhang, Libo Huang, Hui Guo. 794-797 [doi]
• FPGA-based Intruder Detection Systems for Aerial RobotsMaliha Kabir, Roberto Gomez Gonzalez, Troy Pulaski, Parker Wilmoth, Prabha Sundaravadivel. 798-801 [doi]
• Embedding Environmental Intelligence in Low-Cost DronesRoberto Gomez Gonzalez, Miguel Gomez Gonzalez, Luis Trevino, Prabha Sundaravadivel. 802-804 [doi]
• Advancing PUF Security Machine Learning Assisted Modeling AttacksNiraj Prasad Bhatta, Fathi H. Amsaad 0001. 805-808 [doi]
• Automated Generation of Dual Rail Adiabatic Gates from Binary Decision DiagramsJoseph Clark, Elijah Raffel, Himanshu Thapliyal. 809-811 [doi]
• Enhancing Supply Chain Security: ML Assisted Manufacturer Identification of SRAM PUFsHarshdeep Singh, Fathi H. Amsaad 0001. 812-816 [doi]
• Physically Unclonable and Reconfigurable Circuits for IP Protection: Opportunities and ChallengesMrittika Chowdhury, Mahmudul Hasan 0012, Tamzidul Hoque, Md Sakib Hasan. 817-820 [doi]
• Federated Learning: A Paradigm Shift in Cybersecurity for Smart GridsOwen O'Connor, Tarek Elfouly. 821-824 [doi]
• Advancing IoT Security Through Run-time Monitoring & Post-Execution VerificationMahsa Dehghani, Mehdi Elahi, Mahdi Fazeli, Ahmad Patooghy. 825-829 [doi]